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| Titre : | Design of High-Speed Communication Circuits |
| Auteurs : | Ramesh Harjani, Auteur |
| Type de document : | document électronique |
| Editeur : | World scientific, 2006 |
| ISBN/ISSN/EAN : | 978-981-277-458-3 |
| Format : | 232p / PDF |
| Langues: | Anglais |
| Langues originales: | Anglais |
| Index. décimale : | 621.38 (Electronique, technologie des communications (Télécommunications)) |
| Catégories : | |
| Mots-clés: | wireless communication circuits ; high-speed analog/RF |
| Résumé : | Abstract:MOS technology has rapidly become the de facto standard for mixed-signal integrated circuit design due to the high levels of integration possible as device geometries shrink to nanometer scales. The reduction in feature size means that the number of transistor and clock speeds have increased significantly. In fact, current day microprocessors contain hundreds of millions of transistors operating at multiple gigahertz. Furthermore, this reduction in feature size also has a significant impact on mixed-signal circuits. Due to the higher levels of integration, the majority of ASICs possesses some analog components. It has now become nearly mandatory to integrate both analog and digital circuits on the same substrate due to cost and power constraints. This book presents some of the newer problems and opportunities offered by the small device geometries and the high levels of integration that is now possible.The aim of this book is to summarize some of the most critical aspects of high-speed analog/RF communications circuits. Attention is focused on the impact of scaling, substrate noise, data converters, RF and wireless communication circuits and wireline communication circuits, including high-speed I/O. |
| Note de contenu : |
Contents:
Chapter 1: Achieving Analog Accuracy in Nanometer CMOS Chapter 2: Self-Induced Noise in Integrated Circuits Chapter 3: High-Speed Oversampling Analog-to-Digital Converters Chapter 4: Designing LC VCOs Using Capacitive Degeneration Techniques Chapter 5: Fully Integrated Frequency Synthesizers: A Tutorial Chapter 6: Recent Advances and Design Trends in CMOS Radio FrequencyIntegrated Circuits Chapter 7: Equalizers for High-Speed Serial Links Chapter 8: Low-Power, Parallel Interface with Continuous-Time Adaptive PassiveEqualizer and Crosstalk Cancellation. |
Exemplaires (1)
| Cote | Support | Localisation | Section | Disponibilité |
|---|---|---|---|---|
| F8/12799 | E-Book Téléchargeable (PDF) | Bibliothèque de la Faculté de Technologie | Digital library | Téléchargeable Disponible |
